Opportunity available for an IC Design Engineer to join our client in Abu Dhabi. You will play a crucial role in the design and development of integrated circuits (ICs) for telecommunications applications. Job REF: ICDEAD04 Location: Abu Dhabi, UAE Job type: Contract One year, extendable Benefits: Visa & Sponsorship + Medical insurance + Net salary commensurate with experience up to 22k AED Key Responsibilities: \xc2\xb7 Design and implement complex digital and mixed-signal ICs for telecom applications, including but not limited to RF transceivers, baseband processors, and signal processing units. \xc2\xb7 Collaborate with system architects to define IC specifications and requirements based on system-level performance goals. \xc2\xb7 Utilize industry-standard EDA tools for IC design, simulation, and verification, ensuring design correctness and integrity. \xc2\xb7 Perform RTL coding, synthesis, and timing analysis for digital blocks, optimizing for power, performance, and area (PPA). \xc2\xb7 Develop and integrate analog/mixed-signal circuitry, such as ADCs, DACs, PLLs, and voltage regulators, into the IC design. \xc2\xb7 Conduct thorough functional and performance validation of IC prototypes through lab testing and characterization. \xc2\xb7 Work closely with layout engineers to ensure proper physical implementation of the IC design, addressing layout-dependent effects and constraints. \xc2\xb7 Participate in design reviews, project planning, and documentation activities to ensure project milestones are met within schedule and budget constraints. Qualifications: \xc2\xb7 Bachelor\'s or Master\'s degree in Electrical Engineering, Computer Engineering, or a related field. A Ph.D. is a plus. \xc2\xb7 Prior experience in telecom IC design, particularly in wireless communication systems (e.g., 5G, LTE, Wi-Fi), is mandatory. \xc2\xb7 Hands-on experience with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor Graphics) for IC design, simulation, and verification. \xc2\xb7 Solid understanding of digital and analog/mixed-signal IC design principles, methodologies, and tools. \xc2\xb7 Familiarity with CMOS process technologies and their impact on IC design constraints and trade-offs. Interested candidates are invited to submit their Technical CV highlighting their expertise for the position by email to suraj.paudel@ateca.co.uk mentioning the subject : ICDEAD04 Job Type: Full-time